Oxide-oxide wafer bonding, or copper-oxide hybrid bonding require extremely flat (sub-nm roughness) surfaces for void-free bonds with high bond strength. There are two primary causes for wafer edge topography when thick metal lines or vias are near the bonding surface. The first, Cu Edge Bead Removal (EBR), can remove copper in deep trenches at the wafer edge, thereby producing a large void that may not be properly filled/planarized with subsequent processing. These voids can lead to delamination of bonded wafers at the edge. The second, Litho Edge Bead Removal, can leave the wafer edge unexposed during etching, thereby producing a large discontinuity in film thickness at the location of the EBR.
Therefore, techniques for protecting the wafer edge during processing without introducing topography further in from the edge due to a discontinuity in film thickness would be desirable.